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FPGA Project Analyzer MCP
Inspects Vivado, Zynq and PYNQ project files through MCP, with interactive diagrams and checks for clock crossings, constraints and overlay mismatches. Vivado is optional, but structural parsing can miss hardware paths. Treat findings as candidates to confirm against source. Public repository created October 26, 2026.
MCP unverified
Integration
| Transport | stdio |
| Auth | none |
| Endpoint | fpa mcp |
| Install | Install from the source repository with pipx per README using Python 3.8 or later, then register fpa mcp; confirm candidate findings with source or Vivado elaboration |
Use Cases
| 01 | Explore an FPGA block diagram |
| 02 | Review possible clock-domain crossings |
Tags
fpga vivado zynq hardware-review
Machine-readable: /api/servers.json
· JSON-LD schema embedded in <head>